Contiki-Inga 3.x
mspi.h
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1 /*
2  * Copyright (c) 2012, TU Braunschweig.
3  * All rights reserved.
4  *
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13  * 3. Neither the name of the Institute nor the names of its contributors
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15  * without specific prior written permission.
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17  * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
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28  */
29 
30 /**
31  * \file
32  * MSPI driver definitions
33  * \author
34  * Ulf Kulau <kulau@ibr.cs.tu-bs.de>
35  */
36 
37 /**
38  * \addtogroup inga_bus_driver
39  * @{
40  */
41 
42 /**
43  * \defgroup mspi_driver Master SPI Bus Driver (MSPI)
44  *
45  * <p>There are a lot of possibilities to realize a Serial Peripheral Interface (SPI) with the
46  * ATmega1284p, but the hardware SPI is used by the transceiver chip AT86rf230. In combination
47  * with contiki it is not possible to build up an SPI Bus with this hardware SPI.
48  * A software SPI would be a solution, but the ATmega1284p provides another opportunity. The MSPI
49  * (Maser SPI) is an alternative function of the USART. There are two independent hardware USART,
50  * so it is possible to use one for the default debug RS232 interface, while the other one is
51  * free to be used as an MSPI. The only difference between an normal SPI and the MSPI is, that
52  * MSPI only supports slaves on the bus.</p>
53  * @{
54  */
55 
56 #ifndef MSPIDRV_H_
57 #define MSPIDRV_H_
58 
59 #include <avr/io.h>
60 /*!
61  * Enable or disable the MSPI-Bus Manager.
62  *
63  * \note The...
64  */
65 #ifndef MSPI_BUS_MANAGER
66 #define MSPI_BUS_MANAGER 1
67 #endif
68 
69 #if MSPI_BUS_MANAGER
70 #include "mspi-mgr.h"
71 #endif
72 
73 #define MSPI_USART0 0
74 #define MSPI_USART1 1
75 /*\cond*/
76 #define MSPI_ENABLE (0xC0)
77 #define MSPI_DISABLE (0x06)
78 #define MSPI_CS_DISABLE 0
79 #define MSPI_DUMMY_BYTE 0xFF
80 /*\endcond*/
81 
82 
83 #define MSPI_CS_PORT PORTA
84 #define MSPI_CS_PORT_DDR DDRA
85 #define MSPI_CS_PIN_0 PORTA5
86 #define MSPI_CS_PIN_1 PORTA6
87 #define MSPI_CS_PIN_2 PORTA7
88 
89 /********************************************************************
90  * MSPI mode:
91  ********************************************************************/
92 
93 /*!
94  * MSPI Mode 0
95  * \note <ul>
96  * <li> Leading Edge: Sample (Rising Edge)
97  * <li> Trailing Edge: Setup (Falling Edge)
98  * </ul>
99  */
100 #define MSPI_MODE_0 (0x00)
101 /*!
102  * MSPI Mode 1
103  * \note <ul>
104  * <li> Leading Edge: Setup (Rising Edge)
105  * <li> Trailing Edge: Sample (Falling Edge)
106  * </ul>
107  */
108 #define MSPI_MODE_1 (0x02)
109 /*!
110  * MSPI Mode 2
111  * \note <ul>
112  * <li> Leading Edge: Sample (Falling Edge)
113  * <li> Trailing Edge: Setup (Rising Edge)
114  * </ul>
115  */
116 #define MSPI_MODE_2 (0x01)
117 /*!
118  * MSPI Mode 3
119  * \note <ul>
120  * <li> Leading Edge: Setup (Falling Edge)
121  * <li> Trailing Edge: Sample (Rising Edge)
122  * </ul>
123  */
124 #define MSPI_MODE_3 (0x03)
125 
126 /********************************************************************
127  * MSPI BAUD Rate:
128  ********************************************************************/
129 
130 /*!
131  * Maximum MSPI Baud Rate [bps]
132  * \note The maximum baud rate is f_osc/2
133  */
134 #define MSPI_BAUD_MAX (0x00)
135 /*!
136  * 2Mbps MSPI Baud Rate
137  * \note Assumption: f_osc = 8 MHz
138  */
139 #define MSPI_BAUD_2MBPS (0x01)
140 /*!
141  * 1Mbps MSPI Baud Rate
142  * \note Assumption: f_osc = 8 MHz
143  */
144 #define MSPI_BAUD_1MBPS (0x03)
145 
146 typedef struct {
147  /*!
148  * MSPI Baud Rate Register (USART0/USART1)
149  */
150  volatile uint16_t * UBRRn;
151  /*!
152  * MSPI Serial Clock Pin Data Direction Register (USART0/USART1)
153  */
154  volatile uint8_t * XCKn_DDR; //Uart0 = DDRB //Uart1 = DDRD
155  /*!
156  * MSPI Serial Clock Pin (USART0/USART1)
157  */
158  volatile uint8_t XCKn; //Uart0 = PORTB0 //Uart1 = PORTD4
159  /*!
160  * MSPIM Control and Status Register A (USART0/USART1)
161  */
162  volatile uint8_t * UCSRnA;
163  /*!
164  * MSPIM Control and Status Register B (USART0/USART1)
165  */
166  volatile uint8_t * UCSRnB;
167  /*!
168  * MSPIM Control and Status Register C (USART0/USART1)
169  */
170  volatile uint8_t * UCSRnC;
171  /*!
172  * MSPI I/O Data Register (USART0/USART1)
173  */
174  volatile uint8_t * UDRn;
175 } usart_t;
176 
177 /**
178  * \brief Initialize the selected USART in the MSPI mode
179  *
180  * \param mode Select the (M)SPI mode (MSPI_MODE_0 ...
181  * MSPI_MODE_3)
182  * \param baud The MSPI BAUD rate. Sometimes it is necessary
183  * to reduce the SCK. Use MSPI_BAUD_MAX in common case.
184  *
185  */
186 void mspi_init(uint8_t cs, uint8_t mode, uint16_t baud);
187 
188 /**
189  * \brief This function can be use either to transmit or receive
190  * data via spi.
191  *
192  * \param data <ul>
193  * <li>When use this function to transmit: Data byte, which
194  * has to be transmit.
195  * <li>When use this function to receive: Data value don't
196  * care. (Dummy Byte, e.g. 0xFF)
197  * </ul>
198  * \return <li>When use this function to transmit: The return value
199  * doesn't care
200  * <li>When use this function to receive: Received data
201  * from the spi slave
202  * </ul>
203  *
204  * \note The various devices along the SPI Bus are separated by the
205  * Chip Select (cs). The assignment of the SPI-devices depends on
206  * the hardware wiring. The correct chip select an spi configuration
207  * will be done by the spi-bus.manager. Otherwise please ensure,
208  * which Chip Select and spi bus configuration belong to which
209  * SPI device.
210  */
211 uint8_t mspi_transceive(uint8_t data);
212 
213 /**
214  * \brief This function enables the chip select by setting the
215  * needed I/O pins (BCD-Code)
216  *
217  * \param cs Chip Select: Device ID
218  */
219 void mspi_chip_select(uint8_t cs);
220 
221 /**
222  * \brief This function disables the chip select
223  *
224  * \param cs Chip Select: Device ID
225  */
226 void mspi_chip_release(uint8_t cs);
227 
228 /**
229  * \brief This function will set all MSPI registers to their
230  * default values.
231  */
232 void mspi_deinit(void);
233 
234 /** @} */ // mspi_driver
235 /** @} */ // inga_bus_driver
236 
237 #endif /* MSPIDRV_H_ */