Contiki-Inga 3.x
uart.h
Go to the documentation of this file.
1 /*
2  * Copyright (c) 2012, Texas Instruments Incorporated - http://www.ti.com/
3  * All rights reserved.
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions
7  * are met:
8  * 1. Redistributions of source code must retain the above copyright
9  * notice, this list of conditions and the following disclaimer.
10  * 2. Redistributions in binary form must reproduce the above copyright
11  * notice, this list of conditions and the following disclaimer in the
12  * documentation and/or other materials provided with the distribution.
13  *
14  * 3. Neither the name of the copyright holder nor the names of its
15  * contributors may be used to endorse or promote products derived
16  * from this software without specific prior written permission.
17  *
18  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
19  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
20  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
21  * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
22  * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
23  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
24  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
25  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
26  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
27  * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
29  * OF THE POSSIBILITY OF SUCH DAMAGE.
30  */
31 /**
32  * \addtogroup cc2538
33  * @{
34  *
35  * \defgroup cc2538-uart cc2538 UART
36  *
37  * Driver for the cc2538 UART controller
38  * @{
39  *
40  * \file
41  * Header file for the cc2538 UART driver
42  */
43 #ifndef UART_H_
44 #define UART_H_
45 
46 #include "contiki.h"
47 
48 #include <stdint.h>
49 /*---------------------------------------------------------------------------*/
50 /** \name UART base addresses
51  * @{
52  */
53 #define UART_0_BASE 0x4000C000
54 #define UART_1_BASE 0x4000D000
55 
56 /* Default to UART 0 unless the configuration tells us otherwise */
57 #ifdef UART_CONF_BASE
58 #define UART_BASE UART_CONF_BASE
59 #else
60 #define UART_BASE UART_0_BASE
61 #endif
62 /** @} */
63 /*---------------------------------------------------------------------------*/
64 /**
65  * \name Baud rate defines
66  *
67  * Used in uart_init() to set the values of UART_IBRD and UART_FBRD in order to
68  * achieve some standard baud rates. These defines assume that the UART is
69  * clocked at 16MHz and that Clock Div is 16 (UART_CTL:HSE clear)
70  * @{
71  */
72 #define UART_IBRD_9600 104 /**< IBRD value for baud rate 9600 */
73 #define UART_FBRD_9600 11 /**< FBRD value for baud rate 9600 */
74 #define UART_IBRD_38400 26 /**< IBRD value for baud rate 38400 */
75 #define UART_FBRD_38400 3 /**< FBRD value for baud rate 38400 */
76 #define UART_IBRD_57600 17 /**< IBRD value for baud rate 57600 */
77 #define UART_FBRD_57600 24 /**< FBRD value for baud rate 57600 */
78 #define UART_IBRD_115200 8 /**< IBRD value for baud rate 115200 */
79 #define UART_FBRD_115200 44 /**< FBRD value for baud rate 115200 */
80 #define UART_IBRD_230400 4 /**< IBRD value for baud rate 230400 */
81 #define UART_FBRD_230400 22 /**< FBRD value for baud rate 230400 */
82 #define UART_IBRD_460800 2 /**< IBRD value for baud rate 460800 */
83 #define UART_FBRD_460800 11 /**< FBRD value for baud rate 460800 */
84 
85 #if UART_CONF_BAUD_RATE==9600
86 #define UART_CONF_IBRD UART_IBRD_9600
87 #define UART_CONF_FBRD UART_FBRD_9600
88 #elif UART_CONF_BAUD_RATE==38400
89 #define UART_CONF_IBRD UART_IBRD_38400
90 #define UART_CONF_FBRD UART_FBRD_38400
91 #elif UART_CONF_BAUD_RATE==57600
92 #define UART_CONF_IBRD UART_IBRD_57600
93 #define UART_CONF_FBRD UART_FBRD_57600
94 #elif UART_CONF_BAUD_RATE==115200
95 #define UART_CONF_IBRD UART_IBRD_115200
96 #define UART_CONF_FBRD UART_FBRD_115200
97 #elif UART_CONF_BAUD_RATE==230400
98 #define UART_CONF_IBRD UART_IBRD_230400
99 #define UART_CONF_FBRD UART_FBRD_230400
100 #elif UART_CONF_BAUD_RATE==460800
101 #define UART_CONF_IBRD UART_IBRD_460800
102 #define UART_CONF_FBRD UART_FBRD_460800
103 #else /* Bail out with an error unless the user provided custom values */
104 #if !(defined UART_CONF_IBRD && defined UART_CONF_FBRD)
105 #error "UART baud rate misconfigured and custom IBRD/FBRD values not provided"
106 #error "Check the value of UART_CONF_BAUD_RATE in contiki-conf.h or project-conf.h"
107 #error "Supported values are 9600, 38400, 57600, 115200, 230400 and 460800."
108 #error "Alternatively, you can provide custom values for "
109 #error "UART_CONF_IBRD and UART_CONF_FBRD"
110 #endif
111 #endif
112 /** @} */
113 /*---------------------------------------------------------------------------*/
114 /** \name UART Register Offsets
115  * @{
116  */
117 #define UART_DR 0x00000000 /**< UART data */
118 #define UART_RSR 0x00000004 /**< UART RX status and err clear */
119 #define UART_ECR 0x00000004 /**< UART RX status and err clear */
120 #define UART_FR 0x00000018 /**< UART flag */
121 #define UART_ILPR 0x00000020 /**< UART IrDA low-power */
122 #define UART_IBRD 0x00000024 /**< UART BAUD divisor: integer */
123 #define UART_FBRD 0x00000028 /**< UART BAUD divisor: fractional */
124 #define UART_LCRH 0x0000002C /**< UART line control */
125 #define UART_CTL 0x00000030 /**< UART control */
126 #define UART_IFLS 0x00000034 /**< UART interrupt FIFO level */
127 #define UART_IM 0x00000038 /**< UART interrupt mask */
128 #define UART_RIS 0x0000003C /**< UART raw interrupt status */
129 #define UART_MIS 0x00000040 /**< UART masked interrupt status */
130 #define UART_ICR 0x00000044 /**< UART interrupt clear */
131 #define UART_DMACTL 0x00000048 /**< UART DMA control */
132 #define UART_LCTL 0x00000090 /**< UART LIN control */
133 #define UART_LSS 0x00000094 /**< UART LIN snap shot */
134 #define UART_LTIM 0x00000098 /**< UART LIN timer */
135 #define UART_NINEBITADDR 0x000000A4 /**< UART 9-bit self address */
136 #define UART_NINEBITAMASK 0x000000A8 /**< UART 9-bit self address mask */
137 #define UART_PP 0x00000FC0 /**< UART peripheral properties */
138 #define UART_CC 0x00000FC8 /**< UART clock configuration */
139 /** @} */
140 /*---------------------------------------------------------------------------*/
141 /** \name UART_DR Register Bit-Masks
142  * @{
143  */
144 #define UART_DR_OE 0x00000800 /**< UART overrun error */
145 #define UART_DR_BE 0x00000400 /**< UART break error */
146 #define UART_DR_PE 0x00000200 /**< UART parity error */
147 #define UART_DR_FE 0x00000100 /**< UART framing error */
148 #define UART_DR_DATA 0x000000FF /**< Data transmitted or received */
149 /** @} */
150 /*---------------------------------------------------------------------------*/
151 /** \name UART_RSR Register Bit-Masks
152  * @{
153  */
154 #define UART_RSR_OE 0x00000008 /**< UART overrun error */
155 #define UART_RSR_BE 0x00000004 /**< UART break error */
156 #define UART_RSR_PE 0x00000002 /**< UART parity error */
157 #define UART_RSR_FE 0x00000001 /**< UART framing error */
158 /** @} */
159 /*---------------------------------------------------------------------------*/
160 /** \name UART_ECR Register Bit-Masks
161  * @{
162  */
163 #define UART_ECR_DATA 0x000000FF /**< Error clear */
164 /** @} */
165 /*---------------------------------------------------------------------------*/
166 /** \name UART_FR Register Bit-Masks
167  * @{
168  */
169 #define UART_FR_TXFE 0x00000080 /**< UART transmit FIFO empty */
170 #define UART_FR_RXFF 0x00000040 /**< UART receive FIFO full */
171 #define UART_FR_TXFF 0x00000020 /**< UART transmit FIFO full */
172 #define UART_FR_RXFE 0x00000010 /**< UART receive FIFO empty */
173 #define UART_FR_BUSY 0x00000008 /**< UART busy */
174 #define UART_FR_CTS 0x00000001 /**< Clear to send */
175 /** @} */
176 /*---------------------------------------------------------------------------*/
177 /** \name UART_ILPR Register Bit-Masks
178  * @{
179  */
180 #define UART_ILPR_ILPDVSR 0x000000FF /**< IrDA low-power divisor */
181 /** @} */
182 /*---------------------------------------------------------------------------*/
183 /** \name UART_IBRD Register Bit-Masks
184  * @{
185  */
186 #define UART_IBRD_DIVINT 0x0000FFFF /**< Integer baud-rate divisor */
187 /** @} */
188 /*---------------------------------------------------------------------------*/
189 /** \name UART_FPRD Register Bit-Masks
190  * @{
191  */
192 #define UART_FBRD_DIVFRAC 0x0000003F /**< Fractional baud-rate divisor */
193 /** @} */
194 /*---------------------------------------------------------------------------*/
195 /** \name UART_LCRH Register Bit-Masks
196  * @{
197  */
198 #define UART_LCRH_SPS 0x00000080 /**< UART stick parity select */
199 #define UART_LCRH_WLEN 0x00000060 /**< UART word length */
200 #define UART_LCRH_FEN 0x00000010 /**< UART enable FIFOs */
201 #define UART_LCRH_STP2 0x00000008 /**< UART two stop bits select */
202 #define UART_LCRH_EPS 0x00000004 /**< UART even parity select */
203 #define UART_LCRH_PEN 0x00000002 /**< UART parity enable */
204 #define UART_LCRH_BRK 0x00000001 /**< UART send break */
205 /** @} */
206 /*---------------------------------------------------------------------------*/
207 /** \name UART_LCRH_WLEN Values
208  * @{
209  */
210 #define UART_LCRH_WLEN_8 0x00000060
211 #define UART_LCRH_WLEN_7 0x00000040
212 #define UART_LCRH_WLEN_6 0x00000020
213 #define UART_LCRH_WLEN_5 0x00000000
214 /** @} */
215 /*---------------------------------------------------------------------------*/
216 /** \name UART_CTL Register Bit-Masks
217  * @{
218  */
219 #define UART_CTL_RXE 0x00000200 /**< UART receive enable */
220 #define UART_CTL_TXE 0x00000100 /**< UART transmit enable */
221 #define UART_CTL_LBE 0x00000080 /**< UART loop back enable */
222 #define UART_CTL_LIN 0x00000040 /**< LIN mode enable */
223 #define UART_CTL_HSE 0x00000020 /**< High-speed enable */
224 #define UART_CTL_EOT 0x00000010 /**< End of transmission */
225 #define UART_CTL_SMART 0x00000008 /**< ISO 7816 Smart Card support */
226 #define UART_CTL_SIRLP 0x00000004 /**< UART SIR low-power mode */
227 #define UART_CTL_SIREN 0x00000002 /**< UART SIR enable */
228 #define UART_CTL_UARTEN 0x00000001 /**< UART enable */
229 /** @} */
230 /*---------------------------------------------------------------------------*/
231 /** \name UART_IFLS Register Bit-Masks
232  * @{
233  */
234 #define UART_IFLS_RXIFLSEL 0x00000038 /**< UART RX FIFO level select */
235 #define UART_IFLS_TXIFLSEL 0x00000007 /**< UART TX FIFO level select */
236 /** @} */
237 /*---------------------------------------------------------------------------*/
238 /** \name UART_IFLS_RXIFLSEL Possible Values
239  * @{
240  */
241 #define UART_IFLS_RXIFLSEL_7_8 0x00000020 /**< UART RX FIFO >= 7/8 full */
242 #define UART_IFLS_RXIFLSEL_3_4 0x00000018 /**< UART RX FIFO >= 3/4 full */
243 #define UART_IFLS_RXIFLSEL_1_2 0x00000010 /**< UART RX FIFO >= 1/2 full */
244 #define UART_IFLS_RXIFLSEL_1_4 0x00000008 /**< UART RX FIFO >= 1/4 full */
245 #define UART_IFLS_RXIFLSEL_1_8 0x00000000 /**< UART RX FIFO >= 1/8 full */
246 /** @} */
247 /*---------------------------------------------------------------------------*/
248 /** \name UART_IFLS_TXIFLSEL Possible Values
249  * @{
250  */
251 #define UART_IFLS_TXIFLSEL_1_8 0x00000004 /**< UART TX FIFO >= 1/8 empty */
252 #define UART_IFLS_TXIFLSEL_1_4 0x00000003 /**< UART TX FIFO >= 1/4 empty */
253 #define UART_IFLS_TXIFLSEL_1_2 0x00000002 /**< UART TX FIFO >= 1/2 empty */
254 #define UART_IFLS_TXIFLSEL_3_4 0x00000001 /**< UART TX FIFO >= 3/4 empty */
255 #define UART_IFLS_TXIFLSEL_7_8 0x00000000 /**< UART TX FIFO >= 7/8 empty */
256 /** @} */
257 /*---------------------------------------------------------------------------*/
258 /** \name UART_IM Register Bit-Masks
259  * @{
260  */
261 #define UART_IM_LME5IM 0x00008000 /**< LIN mode edge 5 intr mask */
262 #define UART_IM_LME1IM 0x00004000 /**< LIN mode edge 1 intr mask */
263 #define UART_IM_LMSBIM 0x00002000 /**< LIN mode sync break mask */
264 #define UART_IM_NINEBITIM 0x00001000 /**< 9-bit mode interrupt mask */
265 #define UART_IM_OEIM 0x00000400 /**< UART overrun error mask */
266 #define UART_IM_BEIM 0x00000200 /**< UART break error mask */
267 #define UART_IM_PEIM 0x00000100 /**< UART parity error mask */
268 #define UART_IM_FEIM 0x00000080 /**< UART framing error */
269 #define UART_IM_RTIM 0x00000040 /**< UART receive time-out mask */
270 #define UART_IM_TXIM 0x00000020 /**< UART transmit intr mask */
271 #define UART_IM_RXIM 0x00000010 /**< UART receive interrupt mask */
272 #define UART_IM_CTSIM 0x00000002 /**< UART CTS modem mask */
273 /** @} */
274 /*---------------------------------------------------------------------------*/
275 /** \name UART_RIS Register Bit-Masks
276  * @{
277  */
278 #define UART_RIS_LME5RIS 0x00008000 /**< LIN mode edge 5 raw */
279 #define UART_RIS_LME1RIS 0x00004000 /**< LIN mode edge 1 raw */
280 #define UART_RIS_LMSBRIS 0x00002000 /**< LIN mode sync break raw */
281 #define UART_RIS_NINEBITRIS 0x00001000 /**< 9-bit mode raw intr */
282 #define UART_RIS_OERIS 0x00000400 /**< UART overrun error raw */
283 #define UART_RIS_BERIS 0x00000200 /**< UART break error raw */
284 #define UART_RIS_PERIS 0x00000100 /**< UART parity error raw */
285 #define UART_RIS_FERIS 0x00000080 /**< UART framing error raw */
286 #define UART_RIS_RTRIS 0x00000040 /**< UART RX time-out raw */
287 #define UART_RIS_TXRIS 0x00000020 /**< UART transmit raw */
288 #define UART_RIS_RXRIS 0x00000010 /**< UART receive raw */
289 #define UART_RIS_CTSRIS 0x00000002 /**< UART CTS modem */
290 /** @} */
291 /*---------------------------------------------------------------------------*/
292 /** \name UART_RIS Register Bit-Masks
293  * @{
294  */
295 #define UART_MIS_LME5MIS 0x00008000 /**< LIN mode edge 5 masked stat */
296 #define UART_MIS_LME1MIS 0x00004000 /**< LIN mode edge 1 masked stat */
297 #define UART_MIS_LMSBMIS 0x00002000 /**< LIN mode sync br masked stat */
298 #define UART_MIS_NINEBITMIS 0x00001000 /**< 9-bit mode masked stat */
299 #define UART_MIS_OEMIS 0x00000400 /**< UART overrun err masked stat */
300 #define UART_MIS_BEMIS 0x00000200 /**< UART break err masked stat */
301 #define UART_MIS_PEMIS 0x00000100 /**< UART parity err masked stat */
302 #define UART_MIS_FEMIS 0x00000080 /**< UART framing err masked stat */
303 #define UART_MIS_RTMIS 0x00000040 /**< UART RX time-out masked stat */
304 #define UART_MIS_TXMIS 0x00000020 /**< UART TX masked intr stat */
305 #define UART_MIS_RXMIS 0x00000010 /**< UART RX masked intr stat */
306 #define UART_MIS_CTSMIS 0x00000002 /**< UART CTS modem masked stat */
307 /** @} */
308 /*---------------------------------------------------------------------------*/
309 /** \name UART_ICR Register Bit-Masks
310  * @{
311  */
312 #define UART_ICR_LME5IC 0x00008000 /**< LIN mode edge 5 intr clear */
313 #define UART_ICR_LME1IC 0x00004000 /**< LIN mode edge 1 intr clear */
314 #define UART_ICR_LMSBIC 0x00002000 /**< LIN mode sync br intr clear */
315 #define UART_ICR_NINEBITIC 0x00001000 /**< 9-bit mode intr clear */
316 #define UART_ICR_OEIC 0x00000400 /**< Overrun error intr clear */
317 #define UART_ICR_BEIC 0x00000200 /**< Break error intr clear */
318 #define UART_ICR_PEIC 0x00000100 /**< Parity error intr clear */
319 #define UART_ICR_FEIC 0x00000080 /**< Framing error intr clear */
320 #define UART_ICR_RTIC 0x00000040 /**< Receive time-out intr clear */
321 #define UART_ICR_TXIC 0x00000020 /**< Transmit intr clear */
322 #define UART_ICR_RXIC 0x00000010 /**< Receive intr clear */
323 #define UART_ICR_CTSIC 0x00000002 /**< UART CTS modem intr clear */
324 /** @} */
325 /*---------------------------------------------------------------------------*/
326 /** \name UART_DMACTL Register Bit-Masks
327  * @{
328  */
329 #define UART_DMACTL_DMAERR 0x00000004 /**< DMA on error */
330 #define UART_DMACTL_TXDMAE 0x00000002 /**< Transmit DMA enable */
331 #define UART_DMACTL_RXDMAE 0x00000001 /**< Receive DMA enable */
332 /** @} */
333 /*---------------------------------------------------------------------------*/
334 /** \name UART_LCTL Register Bit-Masks
335  * @{
336  */
337 #define UART_LCTL_BLEN 0x00000030 /**< Sync break length */
338 #define UART_LCTL_MASTER 0x00000001 /**< LIN master enable */
339 /** @} */
340 /*---------------------------------------------------------------------------*/
341 /** \name UART_LSS Register Bit-Masks
342  * @{
343  */
344 #define UART_LSS_TSS 0x0000FFFF /**< Timer snap shot */
345 /** @} */
346 /*---------------------------------------------------------------------------*/
347 /** \name UART_LTIM Register Bit-Masks
348  * @{
349  */
350 #define UART_LTIM_TIMER 0x0000FFFF /**< Timer value */
351 /** @} */
352 /*---------------------------------------------------------------------------*/
353 /** \name UART_O_NINEBITADDR Register Bit-Masks
354  * @{
355  */
356 #define UART_NINEBITADDR_NINEBITEN 0x00008000 /**< Enable 9-bit mode */
357 #define UART_NINEBITADDR_ADDR 0x000000FF /**< Self address for 9-bit mode */
358 /** @} */
359 /*---------------------------------------------------------------------------*/
360 /** \name UART_O_NINEBITADDR Register Bit-Masks
361  * @{
362  */
363 #define UART_NINEBITAMASK_RANGE 0x0000FF00 /**< Self addr range, 9-bit mode */
364 #define UART_NINEBITAMASK_MASK 0x000000FF /**< Self addr mask, 9-bit mode */
365 /** @} */
366 /*---------------------------------------------------------------------------*/
367 /** \name UART_PP Register Bit-Masks
368  * @{
369  */
370 #define UART_PP_NB 0x00000002 /**< 9-bit support */
371 #define UART_PP_SC 0x00000001 /**< Smart card support */
372 /** @} */
373 /*---------------------------------------------------------------------------*/
374 /** \name UART_CC Register Bit-Masks
375  * @{
376  */
377 #define UART_CC_CS 0x00000007 /**< UART BAUD & sys clock source */
378 /** @} */
379 /*---------------------------------------------------------------------------*/
380 /** \name UART functions
381  * @{
382  */
383 
384 /** \brief Initialises the UART controller, configures I/O control
385  * and interrupts */
386 void uart_init(void);
387 
388 /** \brief Sends a single character down the UART
389  * \param b The character to transmit
390  */
391 void uart_write_byte(uint8_t b);
392 
393 /** \brief Assigns a callback to be called when the UART receives a byte
394  * \param input A pointer to the function
395  */
396 void uart_set_input(int (* input)(unsigned char c));
397 
398 /** @} */
399 
400 #endif /* UART_H_ */
401 
402 /**
403  * @}
404  * @}
405  */
Generated on Thu Apr 24 2014 16:26:15 for Contiki-Inga 3.x by   doxygen 1.8.3.1