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adc.h
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/*
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* Copyright (c) 2012, TU Braunschweig.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. Neither the name of the Institute nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* This file is part of the Contiki operating system.
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*/
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/**
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* \file
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* ADC driver definitions
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* \author
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* Ulf Kulau <kulau@ibr.cs.tu-bs.de>
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*/
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/**
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* \addtogroup inga_sensors_driver
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* @{
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*/
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/**
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* \defgroup adc_driver Analog Digital Converter (internal ADC)
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*
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* <p>The ATmega1284p has 8 ADC-channels. You can run the ADC in
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* different modes like just "single coversion", "free running" or
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* "auto triggered" by timer or interrupts. Moreover it is possible
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* to get differential values of two ADC-channels (with or without
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* a gain factor)</p>
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* @{
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*
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*/
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#ifndef ADCCTR_H_
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#define ADCCTR_H_
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#include <avr/io.h>
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/********************************************************************
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* ADC mode:
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********************************************************************/
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/**
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* \name ADC modes
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* @{ */
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/*!
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* mode: ADC Single Conversion
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* \note The ADC will make just one conversion cycle (normal use)
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*/
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#define ADC_SINGLE_CONVERSION 0xFF
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/*!
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* mode: ADC Free Running Mode
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* \note The ADC runs all the time. An interrupt occurs whenever one ADC cycle
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* will finish
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*/
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#define ADC_FREE_RUNNING 0x00
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/*!
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* mode: ADC Analog Comparator
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* \note Sets the ADC to comparator mode.
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*/
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#define ADC_ANALOG_COMPARATOR (1 << ADTS0)
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/*!
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* mode: External Interrupt Trigger
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* \note Enables the auto trigger mode. The ADC will start a conversion, whenever
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* changes on external interrupt will occur.
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*/
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#define ADC_EXT_INTERRUPT (1 << ADTS1)
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/*!
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* mode: Timer0 Compare Flag Trigger
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* \note Enables the auto trigger mode. The ADC will start a conversion, whenever
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* Timer0 Compare Flag is set.
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*/
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#define ADC_TIMER0_COMP_FLAG ((1 << ADTS1) | (1 << ADTS0))
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/*!
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* mode: Timer0 Compare Flag Trigger
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* \note Enables the auto trigger mode. The ADC will start a conversion, whenever
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* Timer0 overflow occurs.
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*/
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#define ADC_TIMER0_OVERFLOW (1 << ADTS2)
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/*!
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* mode: Timer1 Compare Flag Trigger
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* \note Enables the auto trigger mode. The ADC will start a conversion, whenever
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* Timer0 Compare Flag is set.
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*/
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#define ADC_TIMER1_COMP_FLAG ((1 << ADTS2) | (1 << ADTS0))
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/*!
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* mode: Timer1 Compare Flag Trigger
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* \note Enables the auto trigger mode. The ADC will start a conversion, whenever
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* Timer0 overflow occurs.
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*/
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#define ADC_TIMER1_OVERFLOW ((1 << ADTS2) | (1 << ADTS1))
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/*!
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* mode: Timer1 Compare Flag Trigger
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* \note Enables the auto trigger mode. The ADC will start a conversion, whenever
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* Timer0 Capture Flag is set.
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*/
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#define ADC_TIMER1_CAPTURE ((1 << ADTS2) | (1 << ADTS1) | (1 << ADTS0))
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/** @} */
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/********************************************************************
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* ADC reference voltage source:
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********************************************************************/
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/**
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* \name ADC reference voltage sources
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* @{ */
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/*!
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* ref: External Reference Voltage (Aref)
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* \note The ADC reference voltage is provided by the external reference pin Aref
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*/
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#define ADC_REF_AREF 0
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/*!
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* ref: Supply Voltage Reference (AVcc)
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* \note The ADC reference voltage is provided by the supply voltage.
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*/
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#define ADC_REF_AVCC (1 << REFS0)
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/*!
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* ref: Internal 1.1V Reference
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* \note The ADC reference voltage is provided by internal 1.1V
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*/
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#define ADC_REF_1100MV_INT (1 << REFS1)
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/*!
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* ref: Internal 2.56V Reference
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* \note The ADC reference voltage is provided by internal 2.56V
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*/
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#define ADC_REF_2560MV_INT ((1 << REFS1)| (1 << REFS0))
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/** @} */
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/**
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* \name ADMUX - ADC Multiplexer Selection Register
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* \{ */
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#define ADC_CHANNEL_0 0x00
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#define ADC_CHANNEL_1 0x01
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#define ADC_CHANNEL_2 0x02
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#define ADC_CHANNEL_3 0x03
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#define ADC_CHANNEL_4 0x04
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#define ADC_CHANNEL_5 0x05
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#define ADC_CHANNEL_6 0x06
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#define ADC_CHANNEL_7 0x07
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#define ADC_DIFF_ADC0_ADC0_10X 0x08
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#define ADC_DIFF_ADC1_ADC0_10X 0x09
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#define ADC_DIFF_ADC0_ADC0_200X 0x0A
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#define ADC_DIFF_ADC1_ADC0_200X 0x0B
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#define ADC_DIFF_ADC2_ADC2_10X 0x0C
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#define ADC_DIFF_ADC3_ADC2_10X 0x0D
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#define ADC_DIFF_ADC2_ADC2_200X 0x0E
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#define ADC_DIFF_ADC3_ADC2_200X 0x0F
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#define ADC_DIFF_ADC0_ADC1_1X 0x10
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#define ADC_DIFF_ADC1_ADC1_1X 0x11
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#define ADC_DIFF_ADC2_ADC1_1X 0x12
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#define ADC_DIFF_ADC3_ADC1_1X 0x13
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#define ADC_DIFF_ADC4_ADC1_1X 0x14
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#define ADC_DIFF_ADC5_ADC1_1X 0x15
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#define ADC_DIFF_ADC6_ADC1_1X 0x16
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#define ADC_DIFF_ADC7_ADC1_1X 0x17
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#define ADC_DIFF_ADC0_ADC2_1X 0x18
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#define ADC_DIFF_ADC1_ADC2_1X 0x19
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#define ADC_DIFF_ADC2_ADC2_1X 0x1A
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#define ADC_DIFF_ADC3_ADC2_1X 0x1B
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#define ADC_DIFF_ADC4_ADC2_1X 0x1C
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/** \} */
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/*
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* ADCSRA - ADC control and status register A
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* \cond
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*/
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#define ADC_ENABLE (1 << ADEN)
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#define ADC_START (1 << ADSC)
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#define ADC_STOP 0x00
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#define ADC_LEFT_ADJUSTED (1 << ADLAR)
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#define ADC_RIGHT_ADJUSTED (0 << ADLAR)
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#define ADC_TRIGGER_ENABLE (1 << ADATE)
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#define ADC_TRIGGER_DISABLE (0 << ADATE)
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#define ADC_INTERRUPT_ENABLE (1 << ADIE)
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#define ADC_INTERRUPT_DISABLE (0 << ADIE)
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#define ADC_PRESCALE_2 (1 << ADPS0)
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#define ADC_PRESCALE_4 (1 << ADPS1)
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#define ADC_PRESCALE_8 ((1 << ADPS0) | (1 << ADPS1))
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#define ADC_PRESCALE_16 (1 << ADPS2)
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#define ADC_PRESCALE_32 ((1 << ADPS2) | (1 << ADPS0))
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#define ADC_PRESCALE_64 ((1 << ADPS2) | (1 << ADPS1))
/*choose this for F_CPU = 8MHZ*/
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#define ADC_PRESCALE_128 ((1 << ADPS2) | (1 << ADPS1) | (1 << ADPS0))
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/*
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* \endcond
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*/
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/**
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* \brief Initialize the ADC module
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*
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* \note This routine performes a pre-check whether the AREF pin
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* is connected. It aborts initialization if AREF pin is connected but
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* internal reference is chosen.
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*
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* \param mode Select an ADC mode like single conversion or free running, etc.
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* \param ref The ADC reference voltage source.
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* \retval 0 succeeded
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* \retval 1 failed
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*
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*/
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void
adc_init(uint8_t mode, uint8_t ref);
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/**
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* \brief This function returns the ADC data register
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* value. Use adc_set_mux to preselect the ADC-channel
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* or differential input.
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*
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* \return The ADC-value of preselected mux
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*
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*/
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uint16_t
adc_get_value
(
void
);
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/**
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* \brief This function returns the ADC data register
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* value of the given ADC channel.
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*
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* \param chn The ADC channel (ADC0 ... ADC7)
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*
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* \return The ADC-value
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*
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* This function is more efficient for the single
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* conversion mode. Just select the ADC channel (or
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* differential settings) and get the result.
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*/
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uint16_t
adc_get_value_from
(uint8_t chn);
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/**
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* \brief With this function you can set the ADX multiplexer.
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* Here you select the ADC channel or choose differential
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* value between two ADC-channels with or without gain.
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*
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* \param mux Select single ADC channel (ADC_CHANNEL_0 ... ADC_CHANNEL_7)
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* or differential input of various ADC-channels with or
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* without gain
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*
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*/
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void
adc_set_mux
(uint8_t mux);
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/**
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* \brief This function stops all running ADC
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*
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*/
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void
adc_deinit
(
void
);
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/** @} */
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/** @} */
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#endif
/* ADCCTR_H_ */
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