71 #define HAL_DUMMY_READ         (0x00)  
   73 #define HAL_TRX_CMD_RW         (0xC0)  
   74 #define HAL_TRX_CMD_RR         (0x80)  
   75 #define HAL_TRX_CMD_FW         (0x60)  
   76 #define HAL_TRX_CMD_FR         (0x20)  
   77 #define HAL_TRX_CMD_SW         (0x40)  
   78 #define HAL_TRX_CMD_SR         (0x00)  
   79 #define HAL_TRX_CMD_RADDRM     (0x7F)  
   81 #define HAL_CALCULATED_CRC_OK   (0)  
   95 static uint16_t hal_system_time = 0;
 
   98 static uint8_t 
volatile hal_bat_low_flag; 
 
   99 static uint8_t 
volatile hal_pll_lock_flag;   
 
  148     SPCR         = (1 << SPE) | (1 << MSTR); 
 
  152     TCCR1B = HAL_TCCR1B_CONFIG;       
 
  153     TIFR1 |= (1 << ICF1);             
 
  154     HAL_ENABLE_OVERFLOW_INTERRUPT(); 
 
  168     hal_bat_low_flag     = 0;
 
  169     hal_pll_lock_flag    = 0;
 
  172     rx_start_callback = 
NULL;
 
  173     trx_end_callback  = 
NULL;
 
  188     return hal_bat_low_flag;
 
  198     hal_bat_low_flag = 0;
 
  209     return trx_end_callback;
 
  220     trx_end_callback = trx_end_callback_handle;
 
  231     trx_end_callback = 
NULL;
 
  243     return rx_start_callback;
 
  254     rx_start_callback = rx_start_callback_handle;
 
  265     rx_start_callback = 
NULL;
 
  279     return hal_pll_lock_flag;
 
  289     hal_pll_lock_flag = 0;
 
  310     uint8_t register_value = 0;
 
  318     while ((SPSR & (1 << SPIF)) == 0) {;}
 
  319     register_value = SPDR;
 
  321     SPDR = register_value;
 
  322     while ((SPSR & (1 << SPIF)) == 0) {;}
 
  323     register_value = SPDR;
 
  329     return register_value;
 
  353     while ((SPSR & (1 << SPIF)) == 0) {;}
 
  354     uint8_t dummy_read = SPDR;
 
  357     while ((SPSR & (1 << SPIF)) == 0) {;}
 
  381     register_value &= mask;
 
  382     register_value >>= position; 
 
  384     return register_value;
 
  405     register_value &= ~mask;
 
  411     value |= register_value; 
 
  434     if (!rx_frame && !rx_callback)
 
  443     while ((SPSR & (1 << SPIF)) == 0) {;}
 
  444     uint8_t frame_length = SPDR;
 
  448     while ((SPSR & (1 << SPIF)) == 0) {;}
 
  455             rx_data = (rx_frame->
data);
 
  456             rx_frame->
length = frame_length; 
 
  458             rx_callback(frame_length);
 
  462         while ((SPSR & (1 << SPIF)) == 0) {;}
 
  465             uint8_t tempData = SPDR;
 
  469                 *rx_data++ = tempData;
 
  471                 rx_callback(tempData);
 
  474             crc = _crc_ccitt_update(crc, tempData);
 
  476             while ((SPSR & (1 << SPIF)) == 0) {;}
 
  478         } 
while (--frame_length > 0);
 
  482             rx_frame->
lqi = SPDR;
 
  501             rx_frame->
crc    = 
false;
 
  526     while ((SPSR & (1 << SPIF)) == 0) {;}
 
  527     uint8_t dummy_read = SPDR;
 
  530     while ((SPSR & (1 << SPIF)) == 0) {;}
 
  535         SPDR = *write_buffer++;
 
  538         while ((SPSR & (1 << SPIF)) == 0) {;}
 
  541     } 
while (length > 0);
 
  566     while ((SPSR & (1 << SPIF)) == 0) {;}
 
  567     uint8_t dummy_read = SPDR;
 
  571     while ((SPSR & (1 << SPIF)) == 0) {;}
 
  578         while ((SPSR & (1 << SPIF)) == 0) {;}
 
  580     } 
while (--length > 0);
 
  605     while ((SPSR & (1 << SPIF)) == 0) {;}
 
  606     uint8_t dummy_read = SPDR;
 
  610     while ((SPSR & (1 << SPIF)) == 0) {;}
 
  616         while ((SPSR & (1 << SPIF)) == 0) {;}
 
  618     } 
while (--length > 0);
 
  641     uint32_t isr_timestamp = hal_system_time;
 
  642     isr_timestamp <<= 16;
 
  643     isr_timestamp |= TCNT1;
 
  655     isr_timestamp /= HAL_US_PER_SYMBOL; 
 
  656     isr_timestamp &= HAL_SYMBOL_MASK;
 
  658     while ((SPSR & (1 << SPIF)) == 0) {;}
 
  659     uint8_t interrupt_source = SPDR; 
 
  661     SPDR = interrupt_source;
 
  662     while ((SPSR & (1 << SPIF)) == 0) {;}
 
  663     interrupt_source = SPDR; 
 
  669         if(rx_start_callback != 
NULL){
 
  674             while ((SPSR & (1 << SPIF)) == 0) {;}
 
  675             uint8_t frame_length = SPDR;
 
  678             while ((SPSR & (1 << SPIF)) == 0) {;}
 
  683             rx_start_callback(isr_timestamp, frame_length);
 
  686         if(trx_end_callback != 
NULL){
 
  687             trx_end_callback(isr_timestamp);
 
  701         trx_isr_mask &= ~HAL_BAT_LOW_MASK;